In the integrated circuit industry, many integrated circuits are manufactured simultaneously on a single integrated circuit wafer. A mechanism must be provided to allow for individual test probing of these integrated circuits before the circuits are diced individually from the wafer. FIG. 1 illustrates a prior art apparatus which is used to probe integrated circuits located on the semiconductor wafer.
FIG. 1 generally illustrates two sections of large equipment which are used together in the semiconductor industry to perform wafer probing. FIG. 1 illustrates both a portion of a prober 110 (which is a bottom portion of FIG. 1) and a test head 130 (which is a top portion of FIG. 1). The test head 131 contains a plurality of printed circuit boards 134. Printed circuit boards 134 contain all the necessary electrical circuitry which is required to test integrated circuits located on a wafer mounted on a chuck 111 in FIG. 1. FIG. 1 illustrates a test head mother board 132 which is a large printed circuit board that routes electrical connections for all of the individual boards 134 and physically supports the individual circuit boards 134. Mother board 132 is used to electrically route electrical test signals from the printed circuits boards 134 via pogo pins 119.
The top set of pogo pins 119 illustrated in FIG. 1 is coupled between the load board 118 and the mother board 132 within FIG. 1. Load board 118 is used to physical route electrical test signals from the circuit boards 134 to a physical format which allows for direct interfacing to a probe card 116. In some circumstances, the load board 118 may contain circuitry, such as capacitors or other integrated circuits, which aid or complement the test procedure. Probe card 116 is coupled to the load board 118 via a second set of pogo pins 119 as illustrated in FIG. 1. In another form, the bottom set of electrical connections 119 which couple the load board to the probe card may be male and female connectors instead of pogo pins.
The probe card 116 contains conductive traces which route electrical test signals from the load board to probe needles 117. The most common form of probe contactor used in the industry is referred to as the cantilever probe needle. A wafer chuck 111 is used to support an integrated circuit wafer during testing and is used to bring a semiconductor wafer into contact with the probe needles 117 via vertical (Z) axis motion. Once electrical contact is made between the probe needles 117 and the wafer on chuck 111, electrical testing of devices on the semiconductor wafer located on chuck 111 can be performed using signals transmitted from the printed circuit boards 134.
The test head 131 is mechanically coupled to the prober 110 via several elements which will be discussed below. FIG. 1 illustrates a table top 112 which is connected directly to the prober station 110. Table 112 is typically an inch thick and is made of cast iron. A ring carrier 114 is mounted to the table top 112 as illustrated in FIG. 1. The ring carrier 114 is also coupled to the electrical interconnect system of FIG. 1 as previously described. The ring carrier 114 is further contacted to a connection mechanism 120 as illustrated in FIG. 1. In one form, the connection mechanism 120 is a J-ring or a like structure. In all forms, a first portion of the connection mechanism 120 is connected to the ring carrier 114 and a second portion of the connection mechanism 120 is connected to the test head 131. These two portions of the connection mechanism 120 are brought into contact to form a mechanical connection between the test head 131 and the prober as is known in the art.
The apparatus in FIG. 1 has several disadvantages. In FIG. 1, an extensive number of pogo pins or like electrical contacting mechanisms are connected in series in order to provide control signals between test circuitry and wafers under test. These pogo pins have experimentally been shown to effect electrical signal integrity significantly and add extra delay to transmitted electrical signals. In addition, since pogo pins are mechanical in a way in which they operate, the pogo pins have a higher tendency to fail over time and may result in failed testing procedures which must subsequently be repeated.
In addition, the use of thicker pogo pins and the use of the connection mechanism 120, the ring carrier 114, and the table top 112, results in a substantial distance being formed between the wafer and chuck 111 and the printed circuit boards 134. As illustrated in FIG. 1, this distance from wafer 111 to the test head 130 is roughly 3.5 inches. Due to this large distance of 3.5 inches between the device under test (chuck 111) and the test circuitry which provides test conditions, high-speed test frequencies cannot be achieved for many modern semiconductor devices which are operating at or above 100 megahertz (MHz). In addition, the test head 131 can weigh as much as 400-500 pounds which creates stress problems in the table top 112 and ring carrier 114. New generations of test heads are expected to weigh even more than 400-500 pounds and will only exacerbate stress problems in the test system. When coupling a large mass such as test head 130 to a system using the connection mechanism 120, significant stress results in the electrical system illustrated in FIG. 1. These high stresses in the system of FIG. 1 result in lost yield, lack of test repeatability, and excessive wear.
In addition, since the connection mechanism 120 and table top 112 are utilized to connect the test head 131 to the wafer prober 110, subsequent test head 131 movement to align to various electrical connections is not possible in the system of FIG. 1. A complex and expensive manipulator is connected to the test head 131 to allow for docking of the test head 130 to the prober 110 as illustrated in FIG. 1. Typical manipulators in the industry have somewhere between 5 and 8 adjustments which need to be set rather precisely to result in proper electrical connection of the elements of FIG. 1. Since the manipulator requires several adjustments, a large amount of time is needed during set up before the apparatus of FIG. 1 will be rendered functional.
In addition, in the system of FIG. 1, it becomes necessary to remove the test head 131 in order to gain access to the printed circuit boards 134, the probe cards 116, the load board 118, or other devices within the prober or test head 131. Not only does this removal of the test head 131 require additional time, the removal of the test head requires subsequent re-docking which requires alignment to occur all over again. In addition, the interface between the test head 131 and the prober 110 is highly customized for each prober and each test head. Therefore, swapping between test heads and between probers is not an easy task in the integrated circuit industry and increases costs.
Therefore, the need exists for an improved apparatus for wafer probing semiconductor wafers.